Description:
Title: Senior System IP Design Verification Engineer (Contract)Duration: Through 09/12/2025Pay: $90/hr $120/hr Job OverviewWe're looking for a Senior Staff System IP Design Verification Engineer to lead verification efforts for advanced System IP (coherent interconnects, caches). This is a hands-on role requiring deep experience in UVM, SystemVerilog, and gate-level simulation (GLS). Key ResponsibilitiesDevelop reusable testbenches and verification environments from scratch Drive best practices
Apr 24, 2025;
from:
dice.com