... : Senior System IP Design Verification Engineer (Contract)Duration: Through 09/12 ... Staff System IP Design Verification Engineer to lead verification efforts for ... , caches). This is a hands-on role requiring deep experience in UVM ...
13 days ago
Description: Role: Senior Software Engineer Location: Austin, TX Duration: 6+ Months ...
16 days ago
... Title: System IP Design Verification Engineer Duration: 6 Months Location: Austin, TX ... experience in verification of DV role along withHands on UVM, system ...
19 days ago
... Analyst Location: Austin TX (Hybrid role- 3 day onsite 2 days work from home ...
26 days ago