Description: Title: Senior System IP Design Verification Engineer (Contract) ... 're looking for a Senior Staff System IP Design Verification Engineer to ... lead verification efforts for advanced System IP (coherent interconnects, caches). This ...
6 days ago
Description: Job Title: System IP Design Verification Engineer Duration: 6 ... role along withHands on UVM, system Verilog and TestbenchGate Level simulation ...
12 days ago