... test-bench/model in Verilog, System Verilog or SystemC Working on ... Verification, Emulation Good in programming: System Verilog, PLI/DPI interface, C/C++, PERL ...
a day ago
Description: Title - System IP Design Verification Engineer Duration 6+ Months Job ID - 429704 ... Job Description As a Senior Staff System IP Design Verification Contractor you ... to the functional verification of System IP including coherent interconnect and ...
24 days ago