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Senior SoC Verification Engineer (UVM)

TESSOLVE SEMICONDUCTOR PRIVATE LIMITED
Austin Full-day Full-time

Description:

Key Responsibilities Develop and maintain UVM-based verification environments for complex SoC projects.Create comprehensive test plans, implement test cases, and ensure coverage closure.Debug RTL and testbench failures using industry-standard simulators.Collaborate closely with design, architecture, and firmware teams to ensure verification completeness.Drive verification strategy from block-level to SoC-level integration.Perform functional coverage analysis, assertion-based verification (SVA),
Nov 27, 2025;   from: dice.com

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