Description:
Description The Memory IO team is looking for a passionate and experienced Firmware designers for the pre/post-silicon development of high-speed LPDDR, DDR and inter-chip IO IPs. Be a part of the definition, design and development and productization phase of industry-leading Memory PHYs and interface IP. This opportunity includes enabling of new PHY designs at the microarchitecture, firmware/hardware co-design, and algorithm design level. Firmware design and development of DDR PHY & DRAM Trainin
Aug 7, 2025;
from:
dice.com