Description: 8+ years of experience in ASIC/SoC verification.Strong hands-on experience with SystemVerilog and UVM methodology.Proficiency in testbench architecture, stimulus generation, and scoreboard implementation.Experience with major EDA tools such ...
8 days ago
... : Senior Algorithm Engineer specializing in Error Correction Codes (ECC) for optical communication systems ... integration, and close collaboration with System, VLSI, Firmware, and Verification teams ...
22 days ago